I/O

DMA Registers (0xFFFF_FFA2-0xFFFF_FFAF)

These registers are used for direct memory access (DMA), which allows virtual drives to access the main system memory independently from the CPU, allowing the CPU to perform other tasks in the meantime.

A DMA transfer of one drive block (512 bytes) takes 128 cycles, which is much faster than individually reading/writing the values!

Note that the MMU locks all memory reads and writes during the 128 cycles of a DMA transfer.

The boot values of these registers are not defined! the values of these registers must be set explicitly.

DMA Read Registers

• 0xFFFF_FFA2: Initiate DMA Read
  Write to this write-only address to initiate a DMA read.
  Ensure that the parameters in the registers below have been set before initiation!

• 0xFFFF_FFA3: Drive Number
  The number of the drive to be read from.

• 0xFFFF_FFA4: Block Number
  The number of the drive block to read.

• 0xFFFF_FFA5-0xFFFF_FFA8: RAM Read Start Address
  The drive block data is read into RAM starting at this address (little-endian).

DMA Write Registers

• 0xFFFF_FFA9: Initiate DMA Write
  Write to this write-only address to initiate a DMA write.
  Ensure that the parameters in the registers below have been set before initiation!

• 0xFFFF_FFAA: Drive Number
  The number of the drive to be written to.

• 0xFFFF_FFAB: Block Number
  The number of the drive block to be overwritten.

• 0xFFFF_FFAC-0xFFFF_FFAF: RAM Write Start Address
  The data in RAM starting at this address (little-endian) overwrites the chosen drive block.

VRAM DMA Registers (0xFFFF_FFB0-0xFFFF_FFB9)

Not yet implemented... VRAM DMA coming soon!

Error Register (0xFFFF_FFBA)

Bits in the error register get set if a non-fatal error occurs during program execution. This register is read-only, and reading the register resets all the bits back to 0.

This register is typically used for error handling and user-friendly error reports.

Error Types:

-IllegalRead: This bit is set when a program attempts to read from write-only memory or an unused memory address.

-IllegalWrite: This bit is set when a program attempts to write to read-only memory or an unused memory address.

Each bit corresponds to a different error:

Manual Frame Updates (0xFFFF_FFBB-0xFFFF_FFBD)

Some programs may want to slow down the frame rate until the frame is ready to be displayed. Do to this, programs can write to write-only address 0xFFFF_FFBD to enable manual frame updates.

When manual frame updates are enabled, the screen will not display the new VRAM state until the program writes to write-only address 0xFFFF_FFBB. This triggers a manual frame update, updating the screen to reflect the new VRAM state.

While manual frame updates prevent issues with flickering or invisible graphics, they can lead to choppy or inconsistent frames, so manual frame updates should only be enabled when needed. Ideally, programs should be aware of their timings and/or update the screen before the next frame.

Manual frame updates can be disabled again by writing to the write-only address 0xFFFF_FFBC.

Keyboard Input (0xFFFF_FFBE - 0xFFFF_FFFD)

The keyboard register consists of 64 bytes of memory located at the range [0xFFFF_FFBE-0xFFFF_FFFD]. Each byte corresponds to a physical key on the computer keyboard. When a key's bit is set, that key is currently being pressed. When a key's bit is reset, that key is not currently being pressed.

The order of bits within the keyboard register matches the order of SDL2 Scancodes. As stated above, the key name represents the physical key on the keyboard- the resulting value is handled entirely by the given program.